The present invention relates to integrated circuits and, more particularly, to structures for calibrating probing systems that utilize differential signals to inspect integrated circuits and other microelectronic devices.
Integrated circuits (ICs) are economically attractive because large numbers of often complex circuits, for example microprocessors, can be inexpensively fabricated on the surface of a wafer or substrate. Following fabrication, individual dies, including one or more circuits, are separated or singulated and encased in a package that provides for electrical connections between the exterior of the package and the circuit on the enclosed die. The separation and packaging of a die comprises a significant portion of the cost of manufacturing the integrated circuit device and to monitor and control the IC fabrication process and avoid the cost of packaging defective dies, manufacturers commonly add electrical circuits or test structures to the wafer to enable “probing”, on-wafer testing to verify the characteristics of the integrated circuits, before the dies are singulated.
A test structure typically includes a device-under-test (DUT), a plurality of metallic bond or probe pads that are deposited at the wafer's surface and a plurality of conductive vias that connect the probe pads to the DUT which is typically fabricated beneath the surface of the wafer. The DUT typically comprises a simple circuit that includes a copy of one or more of the basic elements of the marketable integrated circuits fabricated on the wafer, such as a single line of conducting material, a chain of vias or a single transistor. The circuit elements of the DUT are typically produced with the same process and in the same layers of the die as the corresponding elements of the integrated circuit. The ICs are typically characterized “on-wafer” by applying a test instrument generated signal to the test structure and measuring the response of the test structure to the signal. Since the circuit elements of the DUT are fabricated with the same process as the corresponding elements of the integrated circuit, the electrical properties of the DUT are expected to be representative of the electrical properties of the corresponding components of the integrated circuits.
At higher frequencies, on-wafer characterization is commonly performed with a network analyzer. The network analyzer comprises a source of an AC signal, commonly, a radio frequency (RF) signal, that is used to stimulate the DUT of a test structure. A forward-reverse switch directs the stimulating signals to one or more of the probe pads of the test structure. Directional couplers or bridges pick off the forward or reverse waves traveling to or from the test structure. These signals are down-converted by intermediate frequency (IF) sections of the network analyzer where the signals are filtered, amplified and digitized for further processing and display. The preferred interconnection for communicating the signals between the signal source and the signal sink of the network analyzer and the test structure is coaxial cable. The transition between the coaxial cable and the probe pads of the test structure is preferably provided by a movable probe having one or more conductive probe tips that are arranged to be co-locatable with the probe pads of the test structure. The network analyzer and the test structure can be temporarily interconnected by bringing the probe tips into contact with the probe pads of the test structure.
The probe functions as an adapter enabling the signals to transition between the coaxial cable connecting the probe to the network analyzer and the coplanar waveguides of the probe pads. As a result of the transitions from one form of transmission line to another, the probe will perturb high frequency signals transmitted to and from the network analyzer. Relatively accurate measurements can be made with a network analyzer and probe system if the system is calibrated to remove the signal perturbations caused by the interconnection of the network analyzer and the test structure and, in some cases, perturbations caused by components of the test structure. Probing systems are typically calibrated by interconnecting the network analyzer and a calibration structure and stimulating the calibration structure with a test signal. Calibration structures typically comprise one or more conductive contact areas or probe pad regions arranged to spatially conform to the probe tips of the probe(s) to be calibrated. The probe pad regions are interconnected, in various combinations, by a conductive or non-conductive calibration element. Deviations from the ideal response to the stimulating signal are stored in the network analyzer. In a process known as “de-embedding,” the data is used to mathematically compensate for the effect of the probe, or, in some cases, elements of the test structure, when probing a test structure on a wafer.
Most test instrumentation utilizes ground referenced or single ended signals for stimulating the test structure and measuring the response to the stimulation. At higher frequencies noise and interference induced by adjacent circuitry and uncertainty concerning the ground potential often make the integrity of single ended signals inadequate. For example, integrated circuits typically have a ground plane at the lower surface of the substrate on which the active and passive devices of the circuit are fabricated. The terminals of transistors fabricated on a semi-conductive substrate are typically capacitively interconnected, through the substrate, to the ground plane. The impedance of this parasitic interconnection is frequency dependent and at higher frequencies the ground potential and the true nature of single ended signals becomes uncertain.
Differential signals, on the other hand, are transmitted on two conductors which carry inverted copies of the signal waveform and the value of the signal is the difference between the waveforms on the respective conductors. Noise typically effects both conductors equally and this common mode noise or signal is cancelled when the value of the signal is determined from the difference between the waveforms. In addition, the two waveforms are mutual references enabling greater certainty in determining the transition from one value to the other in binary devices and enabling a faster transition between binary values with a reduced voltage swing for the signal. Differential signaling enables a reduction in signal power, an increase in data rate and greater immunity from noise from sources such as power supplies, adjacent circuitry and external sources.
Test structures comprising differential gain cells require five connections to the test instrumentation. The two components of the differential input signal or a common mode signal is transmitted by the network analyzer to two of the probe pads of the test structure and the two components of the differential output signal are transmitted from two other probe pads of the test structure to the network analyzer. At least one additional probe pad of the test structure enables biasing of the transistors of the differential gain cell. Test structures for differential signal probing are, typically, interconnected to the network analyzer with two probes and, correspondingly, calibration structures for differential signal probes provide for simultaneous contact by the tips of two probes. However, a test structure and probe comprising a linear array of probe pads and probe tips permits a differential test structure to be fabricated in a saw street between dies increasing the surface area of the substrate available for the fabrication of marketable ICs.
What is desired are calibration structures for calibrating a differential signal probe having a linear array of contact tips.